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a52f06f81e
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Massive backlog of changes
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2022-06-15 15:59:31 -05:00 |
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755f2a3d69
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Wrote syscall interrupt handler in assembly
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2021-04-19 06:53:39 -05:00 |
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5efc389935
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Finished basic task switching mechansim
PCB is local to a process's address space.
Context switches are written in assembly.
Moved x86 headers to include/x86
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2021-04-19 03:40:33 -05:00 |
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c39cbb79cd
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Task contexts now load segment registers correctly
Interrupt enable bit set in saved EFLAGS register
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2021-04-18 02:10:03 -05:00 |
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ce6371f0c3
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Added ISR for preemption of processes
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2021-04-17 00:59:15 -05:00 |
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6138766c49
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Added sequence to remap PIC
Wrote GDT code in C
Added routines to initialize GDT and IDT
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2021-04-16 01:45:40 -05:00 |
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50fcaa2673
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Added timer ISR
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2021-04-15 07:22:01 -05:00 |
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923057ee1c
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Removed 'interrupt' attribute from isr_ap_start()
Added message to division by 0 exception
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2021-04-15 04:55:28 -05:00 |
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d2617e4488
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Wrote new ISR for AP entry
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2021-04-15 04:51:23 -05:00 |
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3130b07fd1
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Removed generic_isr() definition
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2021-04-14 03:39:25 -05:00 |
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507b0fa53e
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Renamed ISR functions to fit convention
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2021-04-14 03:25:55 -05:00 |
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4e6f487a0a
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Moved ISRs and multiboot2 code to separate files
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2021-04-14 00:11:44 -05:00 |
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